Transaction

e083ca2bec1d8a3bc5fa969cc0165ee78b2c9990c4dbc1effb5051850e83e7b6
Timestamp (utc)
2024-04-02 16:59:14
Fee Paid
0.00000010 BSV
(
0.01129709 BSV
-
0.01129699 BSV
)
Fee Rate
10.64 sat/KB
Version
1
Confirmations
95,711
Size Stats
939 B

2 Outputs

Total Output:
0.01129699 BSV
  • j"1LAnZuoQdcKCkpDBKQMCgziGMoPC4VQUckM¯<div class="post"><div class="quoteheader"><a href="https://bitcointalk.org/index.php?topic=941.msg11484#msg11484">Quote from: BioMike on August 28, 2010, 08:24:05 AM</a></div><div class="quote">So, what CPU's support this? Is this only the newest AMD ones? And how many systems are we excluding because of this?<br/></div><br/>Phenoms, i5 and i7 from what I know. Those are the only CPUs that have a 128 bit SSE2 instruction decoder and benefit at all, every older CPU will be slower. Don't think about it as "only works on AMDs K10" but rather as "tweak the compiler to produce the exact assembly code we want and still be flexible to support other vector engines in the future".</div> text/html
    https://whatsonchain.com/tx/e083ca2bec1d8a3bc5fa969cc0165ee78b2c9990c4dbc1effb5051850e83e7b6