Transaction

978f8feb29fb2defbfa3f9a0946c6d9e47eac8c7e0a95567e0bd3db6e86ffa1c
2024-03-22 13:59:07
0.00000017 BSV
(
0.00609627 BSV
-
0.00609610 BSV
)
10.35 sat/KB
1
70,811
1,642 B

2 Outputs

Total Output:
0.00609610 BSV
  • j"1LAnZuoQdcKCkpDBKQMCgziGMoPC4VQUckMm<div class="post"><div class="quoteheader"><a href="https://bitcointalk.org/index.php?topic=820.msg9617#msg9617">Quote from: tcatm on August 16, 2010, 12:43:39 AM</a></div><div class="quote">I propose to compile sha256.cpp with -O3 -march=amdfamk10 (will work on 32bit and 64bit) as only CPUs supporting this instruction set (AMD Phenom, Intel i5 and newer) benefit from -4way and it'll improve performance by ~9%.<br/></div>GCC 4.3.3 doesn't support -march=amdfamk10.&nbsp; I get:<br/>sha256.cpp:1: error: bad value (amdfamk10) for -march= switch<br/><br/><br/><div class="quoteheader"><a href="https://bitcointalk.org/index.php?topic=820.msg9630#msg9630">Quote from: NewLibertyStandard on August 16, 2010, 01:49:01 AM</a></div><div class="quote">With 4way, I get significantly better performance when I have all my virtual cores enabled. I think I get about the same amount of hashes when hyper threading is turned off with or without 4way.<br/></div>Hey, you may be onto something!<br/><br/>hyperthreading didn't help before because all the work was in the arithmetic and logic units, which the hyperthreads share.<br/><br/>tcatm's SSE2 code must be a mix of normal x86 instructions and SSE2 instructions, so while one is doing x86 code, the other can do SSE2.<br/><br/>How much of an improvement do you get with hyperthreading?<br/><br/>Some numbers? &nbsp;What CPU is that?<br/></div> text/html
    https://whatsonchain.com/tx/978f8feb29fb2defbfa3f9a0946c6d9e47eac8c7e0a95567e0bd3db6e86ffa1c