Transaction

j"1LAnZuoQdcKCkpDBKQMCgziGMoPC4VQUckM¥<div class="post">On a Core 2 Duo T7200, the default code gives about 1.8 Mhash/s, and 4way is slower at 1.0 Mhash/s. It has 4 MB of L2 cache, so it is probably not a question of cache size, as suggested at some point.<br/><br/>Unfortunately, the code (from svn) no longer compiles on ARM, as it now has SSE intrinsics hardcoded. I have removed the -msse2 and -DFOURWAYSSE2 flags from the makefile, and it still produces errors like this<br/><br/><div class="codeheader">Code:</div><div class="code">sha256.cpp:8:23: error: xmmintrin.h: No such file or directory<br/>sha256.cpp:34: error: ‘__m128i’ does not name a type<br/></div><br/>but hopefully this is easy to fix.</div> text/html