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jmetaB03e4bb084ad5772d29a26dd58c42678f6921bf2471bfdcb8a525dc1e55ecf27e6f@4171e0b5905c0a612c8949b16d5afb553d735d24d7a7bba16a66254fce4ecd94rss.itemmetarss.netMŠ <item> <title>Leveraging AI To Efficiently Test AI Chips</title> <link>https://semiengineering.com/leveraging-ai-to-efficiently-test-ai-chips/</link> <comments>https://semiengineering.com/leveraging-ai-to-efficiently-test-ai-chips/#respond</comments> <dc:creator><![CDATA[Advantest]]></dc:creator> <pubDate>Tue, 06 Aug 2024 07:01:44 +0000</pubDate> <category><![CDATA[Blogs - PTES]]></category> <category><![CDATA[Next-Generation Test]]></category> <category><![CDATA[Test, Measurement and Analytics]]></category> <category><![CDATA[Advantest]]></category> <category><![CDATA[AI]]></category> <category><![CDATA[chiplets]]></category> <category><![CDATA[test]]></category> <guid isPermaLink="false">https://semiengineering.com/?p=24246802</guid> <description><![CDATA[<p>Identify patterns and anomalies that might not be discovered by human testers or traditional methods.</p> <p>The post <a href="https://semiengineering.com/leveraging-ai-to-efficiently-test-ai-chips/">Leveraging AI To Efficiently Test AI Chips</a> appeared first on <a href="https://semiengineering.com">Semiconductor Engineering</a>.</p> ]]></description> <content:encoded><![CDATA[<p>In the fast-paced world of technology, where innovation and efficiency are paramount, integrating artificial intelligence (AI) and machine learning (ML) into the semiconductor testing ecosystem has become of critical importance due to ongoing challenges with accuracy and reliability. AI and ML algorithms are used to identify patterns and anomalies that might not be discovered by human testers or traditional methods. By leveraging these technologies, companies can achieve higher accuracy in defect detection, ensuring that only the highest quality semiconductors reach the market. In addition, the industry is clamoring for increased efficiency and speed because AI-driven testing can significantly accelerate the testing process, analyzing vast amounts of data at speeds unattainable by human testers. This enables quicker turnaround times from design to production, helping companies meet market demands more effectively and stay ahead of competitors. Firms are also heavily invested in reducing costs. While the initial investment in AI/ML technology can be expansive, the long-term savings are irrefutable. With automated routine and complex testing processes, companies can reduce labor costs and minimize human error. Equally important, AI-enhanced testing can better predict potential failures before they occur, saving costs related to recalls and repairs.</p> <p>The industry is now moving to chiplet-based modules, using a “Lego-like” approach to integrate CPU, GPU, cache, I/O, high-bandwidth memory (HBM), and other functions. In the rapidly evolving world of chiplets, the DUT is a complex multichip system with the integration of many devices in a single 2.5D or 3D package. Consequently, the tester can only access a subset of individual device pins. Even so, at each test insertion, the tester must be able to extract valuable data that is then used to optimize the current test insertion as well as other design, manufacturing, and test steps. With limited pin access, the tester must infer what is happening on unobservable nodes. To best achieve this goal, it is important to extract the most value possible out of the data that can be directly collected across all manufacturing and test steps, including data from on-chip sensors. The test flow in the chiplet world already includes PSV, wafer acceptance test (WAT), wafer sort (WS), final test (FT), burn-in, and SLT, and additional test insertions to account for the increased complexity of a package with multiple chiplets are not feasible from a cost perspective. Adding to the challenge, binning goes from performance-based to application-based. In this world, the tester must stay ahead of the system – the tester must be smarter than the complex system-under-test.</p> <p><a href="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?ssl=1"><img loading="lazy" decoding="async" class="alignnone size-full wp-image-24246803" src="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?resize=1272%2C616&#038;ssl=1" alt="" width="1272" height="616" srcset="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?w=1272&amp;ssl=1 1272w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?resize=300%2C145&amp;ssl=1 300w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?resize=1024%2C496&amp;ssl=1 1024w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?resize=768%2C372&amp;ssl=1 768w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig1.webp?resize=600%2C291&amp;ssl=1 600w" sizes="(max-width: 1000px) 100vw, 1000px" data-recalc-dims="1" /></a></p> <p><strong>The ACS RTDI platform accelerates data analytics and AI/ML decision-making.</strong></p> <p>So, for these reasons and many more, the adoption of edge compute for ML test applications is well underway. Advantest’s ACS Real-Time Data Infrastructure (ACS RTDI) platform accelerates data analytics and AI/ML decision-making within a single integrated platform. It collects, analyzes, stores, and monitors semiconductor test data as well as data sources across the IC manufacturing supply chain while employing low-latency edge computing and analytics in a secure zero-trust environment. ACS RTDI minimizes the need for human intervention, streamlining overall data utilization across multiple insertions to boost quality, yield, and operational efficiencies. It includes Advantest’s ACS Edge HPC server, which works in conjunction with its V93000 and other ATE systems to handle computationally intensive workloads adjacent to the tester’s host controller.</p> <p><a href="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?ssl=1"><img loading="lazy" decoding="async" class="alignnone size-full wp-image-24246804" src="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?resize=1280%2C720&#038;ssl=1" alt="" width="1280" height="720" srcset="https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?w=1280&amp;ssl=1 1280w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?resize=300%2C169&amp;ssl=1 300w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?resize=1024%2C576&amp;ssl=1 1024w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?resize=768%2C432&amp;ssl=1 768w, https://i0.wp.com/semiengineering.com/wp-content/uploads/Advantest_Leveraging-AI-to-Test-AI-Chips-fig2.webp?resize=600%2C338&amp;ssl=1 600w" sizes="(max-width: 1000px) 100vw, 1000px" data-recalc-dims="1" /></a></p> <p><strong>A reliable, secure real-time data structure that integrates data sources across the IC manufacturing supply chain.</strong></p> <p>In this configuration, the ACS Edge provides low, consistent, and predictable latency compared with a data center-hosted alternative. It supports a user execution environment independent of the tester host controller to ease development and deployment. It also provides a reliable and secure real-time data infrastructure that integrates all data sources across the entire IC manufacturing supply chain, applying analytics models that enable real-time decision-making during production test.</p> <p>The post <a href="https://semiengineering.com/leveraging-ai-to-efficiently-test-ai-chips/">Leveraging AI To Efficiently Test AI Chips</a> appeared first on <a href="https://semiengineering.com">Semiconductor Engineering</a>.</p> ]]></content:encoded> <wfw:commentRss>https://semiengineering.com/leveraging-ai-to-efficiently-test-ai-chips/feed/</wfw:commentRss> <slash:comments>0</slash:comments> <post-id xmlns="com-wordpress:feed-additions:1">24246802</post-id> </item>