Transaction

060cb97cc6438ee122d752704a8d9dbeaaf0b2caa22f2cff5f89befc8fbff1b6
Timestamp (utc)
2024-03-24 15:08:30
Fee Paid
0.00000010 BSV
(
0.01131124 BSV
-
0.01131114 BSV
)
Fee Rate
10.64 sat/KB
Version
1
Confirmations
98,357
Size Stats
939 B

2 Outputs

Total Output:
0.01131114 BSV
  • j"1LAnZuoQdcKCkpDBKQMCgziGMoPC4VQUckM¯<div class="post"><div class="quoteheader"><a href="https://bitcointalk.org/index.php?topic=941.msg11484#msg11484">Quote from: BioMike on August 28, 2010, 08:24:05 AM</a></div><div class="quote">So, what CPU's support this? Is this only the newest AMD ones? And how many systems are we excluding because of this?<br/></div><br/>Phenoms, i5 and i7 from what I know. Those are the only CPUs that have a 128 bit SSE2 instruction decoder and benefit at all, every older CPU will be slower. Don't think about it as "only works on AMDs K10" but rather as "tweak the compiler to produce the exact assembly code we want and still be flexible to support other vector engines in the future".</div> text/html
    https://whatsonchain.com/tx/060cb97cc6438ee122d752704a8d9dbeaaf0b2caa22f2cff5f89befc8fbff1b6